Boost Cell
Description of the Boost Cell converter in Schematic Editor.
Solver platform
- UltraCore: Default option, which utilizes UltraCore to simulate the converter with enhanced resolution, using UltraCore step. UltraCore weight of the component is 1.
- SPC: Simulates the converter using SPC resources, with a simulation timestep equal to the rest of the electrical model. SPC weight of the component is 1.
The Boost Cell component in the Typhoon HIL Schematic Editor Library uses the current source interface. The interface is formulated in such a way that the voltages are inputs to the dedicated UltraCore, while the currents are its outputs. Figure 2 shows the circuit interface of the Boost Cell component.
Schematic Boost Diagram
A schematic block diagram of the Boost Cell with corresponding switch naming is given in Figure 3. Inductance L and its serial resistance R are integrated in Boost Cell the component in order to have the converter structure that can be simulated in the UltraCore.
Control
Selecting Digital inputs as the Control parameter enables assigning gate drive inputs to any of the digital input pins (from 1 to 32(64)). For example, if S1 is assigned to 1, the digital input pin 1 will be routed to the S1 switch gate drive. In addition, the gate_logic parameter selects either active high (High-level input voltage VIH turns on the switch), or active low (Low-level input voltage VIL turns on the switch) gate drive logic, depending on the design of the external controller. In TyphoonSim, digital signals are read from the internal virtual IO bus. Hence, if some signal is sent to digital ouput 1, it will appear on digital input 1.
Selecting Internal modulator as the Control parameter, enables use of the internal PWM modulator for driving switch S1 instead of digital input pins. In this configuration, two additional component inputs will be present. The En input is used to enable/disable the internal PWM modulator, while In is used as a reference signal input.
Analog output variable naming for the Boost Cell switching block (internal to the component)
| Analog output variable name | Description |
|---|---|
| i_L | Inductance current |
Digital Alias
If a converter is controlled by digital inputs, an alias for every digital input used by the converter will be created. Digital input aliases will be available under the Digital inputs list alongside existing Digital input signals. The alias will be shown as Converter_name.Switch_name, where Converter_name is name of the converter component and Switch_name is name of the controllable switch in the converter.
Ports
- In+ (electrical)
- DC input + port
- In- (electrical)
- DC input - port
- Out+ (electrical)
- DC output + port
- Out- (electrical)
- DC output - port
- En (in)
- Available if Internal modulator control is selected
- Used to enable/disable internal modulator
- In (in)
- Available if Internal modulator control is selected
- Used to specify modulation signal value for internal modulator
- Freq (in)
- Available if Internal modulator control is selected and Variable carrier frequency is selected as the modulator's operation mode
- Used to specify modulator's carrier frequency
- Offset (in)
- Available if UltraCore solver and Internal modulator control are selected, and Variable carrier phase offset is selected as the modulator's operation mode
- Used to specify modulator's carrier offset
General (Tab)
- Control
- Specifies how switch is controlled. It is possible to choose between: Digital inputs or Internal modulator
- More details about each type of control can be found in the Control section
- If Digital inputs is selected as Control, the following
properties can be used:
- S1
- Digital input that is used to control S1 switch
- S1_logic
- Logic that will be applied to control signal for S1
- Active high or active low
- S1
- Gate control enabling
- If enabled, gives a possibility to control if changes in the gate control signal are applied or not
- Sen
- Available if Gate control enabling is enabled
- Digital input that enables/disables switching
- Sen_logic
- Available if Gate control enabling is enabled
- Logic that will be applied to Sen signal
- If Internal modulator is selected as Control, the following
properties can be used:
- Operation mode
- Specifies the source of the internal modulator carrier frequency
- If Operation mode is Fixed carrier frequency, then the frequency can be specified on the component properties
- If Operation mode is Variable carrier frequency, then the frequency can be specified using a signal processing port
- Carrier frequency (Hz)
- Available if the Operation mode is a Fixed carrier frequency
- Specifies the internal modulator's carrier frequency
- Phase operation mode (deg)
- Specifies the source of the internal modulator carrier frequency
- If Operation mode is Fixed carrier phase offset, then the carrier phase offset can be specified on the component properties
- If Operation mode is Variable phase offset, then the carrier phase offset can be specified using a signal processing port
- Carrier phase offset (Hz)
- Available if Solver platform is UltraCore and the Phase operation mode is a Fixed carrier phase offset
- Specifies the internal modulator's carrier phase offset
- Dead time period
- Specifies dead time for the internal modulator in seconds
- Reference signal [min, max]
- This property is set by default to [0.0, 1.0]
- Specifies carrier signal minimal and maximal value
- Vector containing two values: the minimal carrier signal value, followed by the maximal carrier signal value
- Operation mode
Electrical (Tab)
- L
- Output inductance
- R
- Inductor series resistance. Switch Rds(on) can be included in this parameter.
Solver (Tab)
- Solver platform
- Select on which platform the converter block will be simulated: SPC or UltraCore
Extras (Tab)
- Short-circuit resistance
- Available only when UltraCore is selected as Solver platform.
- If converter is short-circuited due to negative output voltage, the current that converter draws is limited by this resistance.
- Public - Components marked as public expose their signals on all levels.
- Protected - Components marked as protected will hide their signals to components outside of their first locked parent component.
- Inherit - Components marked as inherit will take the nearest parent 'signal_access' property value that is set to a value other than inherit.