Three Phase Two Level Current Source Inverter

Description of the Three Phase Two Level Current Source Inverter component in Schematic Editor

A schematic block diagram of the inverter switching block is given in Figure 1.

Weight of Three Phase Two Level Current Source Inverter component for real-time simulation is 2.

Figure 1. A schematic block diagram of the three-phase two level current source inverter block diagram with corresponding switch naming

Control

Selecting Digital inputs as the Control parameter, enables you to assign gate drive inputs to any of the digital input pins (from 1 to 32 (64)). For example, if Phase A S1 is assigned to 1, the digital input pin 1 will be routed to the Phase A S1 switch gate drive. In addition, the gate_logic parameter selects either active high (High-level input voltage VIH turns on the switch), or active low (Low-level input voltage VIL turns on the switch). The gate drive logic depends on your external controller design. In TyphoonSim, digital signals are read from the internal virtual IO bus. Hence, if some signal is sent to digital ouput 1, it will appear on digital input 1.

Selecting Model as the Control parameter, enables you to set the IGBTs gate drive signals directly from a signal processing model. The input pin gates appears on the component and requires a vector input of six gate drive signals in the following order: [Phase A S1, Phase A S2, Phase B S1, Phase B S2, Phase C S1, Phase C S2]. When controlled from the model, the logic is always set to active high.

Digital Alias

If a converter is controlled by digital inputs, an alias for every digital input used by the converter will be created. Digital input aliases will be available under the Digital inputs list alongside existing Digital input signals. The alias will be shown as Converter_name.Switch_name, where Converter_name is name of the converter component and Switch_name is name of the controllable switch in the converter.

Ports

  • DC+ (electrical)
    • DC side + port.
  • DC- (electrical)
    • DC side - port.
  • A (electrical)
    • AC side port - phase A
  • B (electrical)
    • AC side port - phase B
  • C (electrical)
    • AC side port - phase C
  • gates (in)
    • Available if model control is selected
    • Vector of 6 input gate signals for switches

General (Tab)

  • Control
    • Specifies how switches are controled. It is possible to choose between: Digital inputs and Model
    • More details about each type of control can be found in the Control section
  • If Digital inputs is selected as Control, the following properties can be used:
    • Phase A S1
      • Digital input that is used to control phase A S1 switch
    • Phase A S1 logic
      • Logic that will be applied to control signal for phase A S1
      • Active high or active low
    • Phase A S2
      • Digital input that is used to control phase A S2 switch
    • Phase A S2 logic
      • Logic that will be applied to control signal for phase A S2
      • Active high or active low
    • Phase B S1
      • Digital input that is used to control phase B S1 switch
    • Phase B S1 logic
      • Logic that will be applied to control signal for phase B S1
      • Active high or active low
    • Phase B S2
      • Digital input that is used to control Phase B S2 switch
    • Phase B S2 logic
      • Logic that will be applied to control signal for phase B S2
      • Active high or active low
    • Phase C S1
      • Digital input that is used to control phase C S1 switch
    • Phase C S1 logic
      • Logic that will be applied to control signal for phase C S1
      • Active high or active low
    • Phase C S2
      • Digital input that is used to control Phase C S2 switch
    • Phase C S2 logic
      • Logic that will be applied to control signal for phase C S2
      • Active high or active low
    • Gate control enabling
      • If enabled, gives a possibility to control if changes in the gate control signal are applied or not
    • Sen
      • Available if Gate control enabling is enabled
      • Digital input that enables/disables switching
    • Sen_logic
      • Available if Gate control enabling is enabled
      • Logic that will be applied to Sen signal
  • If Model is selected as Control, the following properties can be used:
    • Execution rate
      • Defines the period between two updates of gate signals for the component. Gate signals are provided as a signal processing input to component

Extras (Tab)

The Extras tab gives you the opportunity to set Signal Access Management for the component.
Signal visibility is calculated based on the 'signal_access' property and whether or not a parent component in its hierarchy is locked or not. Components that are not contained within locked components expose their signals regardless of the 'signal_access' property. The 'signal_access' property can have one of three values:
  • Public - Components marked as public expose their signals on all levels.
  • Protected - Components marked as protected will hide their signals to components outside of their first locked parent component.
  • Inherit - Components marked as inherit will take the nearest parent 'signal_access' property value that is set to a value other than inherit.