Single-phase thyristor rectifier
This section describes single-phase thyristor rectifiers
A block diagram and input parameters for a single phase thyristor rectifier are given in Table 1.
component | component dialog window | component parameters |
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![]() Single phase thyristor rectifiers |
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A schematic block diagram of the single phase thyristor rectifier block is given in Figure 1 with corresponding thyristor arrangement and naming.
Digital inputs, when selected as a control input option, enables the user to assign gate drive inputs to any of the digital input pins (from 1 to 32/64). For example, if S1 is assigned to 1, the digital input pin 1 will be routed to the S1switch gate drive. In addition, theS1 logic, S2 logic, S3 logic, and S4 logic parameters select either active high(High-level input voltage VIHturns on the switch), or active low(Low-level input voltage VILturns on the switch) gate drive logic, depending on the user’s external controller design.

PESB Optimization
The PESB Optimization option is available in certain converter models. When PESB Optimization is enabled, all converter's short circuit state space modes will be merged and treated as the same state space mode. For example, if one converter leg within the three phase converter is short circuited and PESB Optimization is enabled, all of the legs within the three phase converter will also be short circuited. This simplification for short circuit modeling can save a significant amount of matrix memory.
Digital Alias
If a converter is controlled by digital inputs, an alias for every digital input used by the converter will be created. Digital input aliases will be available under the Digital inputs list alongside existing Digital input signals. The alias will be shown as Converter_name.Switch_name, where Converter_name is name of the converter component and Switch_name is name of the controllable switch in the converter.