Single Phase Thyristor Rectifier
Description of the Single Phase Thyristor Rectifier component in Schematic Editor
A schematic block diagram of the single phase thyristor rectifier block is given in Figure 1 with corresponding thyristor arrangement and naming.
Weight of Single Phase Thyristor Rectifier component for real-time simulation is 2.
Control
Selecting Digital inputs as the Control source parameter enables assigning gate drive inputs to any of the digital input pins (from 1 to 32(64)). For example, if S1 is assigned to 1, the digital input pin 1 will be routed to the S1 switch gate drive. In addition, the gate logic parameter selects either active high (High-level input voltage VIH turns on the switch), or active low (Low-level input voltage VIL turns on the switch) gate drive logic, depending on the design of the external controller. In TyphoonSim, digital signals are read from the internal virtual IO bus. Hence, if some signal is sent to digital ouput 1, it will appear on digital input 1.
Selecting Model as the Control source parameter, enables setting of the thyristors gate signals directly from the signal processing model. The input port gates appears on the component. It is a 4-element vector input, where elements are in the following order: [S1, S2, S3, S4]. When controlled from the model, logic is always active high.
PESB Optimization
The PESB Optimization option is available in certain converter models. When PESB Optimization is enabled, all converter's short circuit state space modes will be merged and treated as the same state space mode. For example, if one converter leg within the three phase converter is short circuited and PESB Optimization is enabled, all of the legs within the three phase converter will also be short circuited. This simplification for short circuit modeling can save a significant amount of matrix memory.
Digital Alias
If a converter is controlled by digital inputs, an alias for every digital input used by the converter will be created. Digital input aliases will be available under the Digital inputs list alongside existing Digital input signals. The alias will be shown as Converter_name.Switch_name, where Converter_name is name of the converter component and Switch_name is name of the controllable switch in the converter.
Ports
- A (electrical)
- AC side port A.
- B (electrical)
- AC side port B.
- DC+ (electrical)
- DC side + port.
- DC- (electrical)
- DC side -port.
- s_ctrl (in)
- Available if model control is selected
- Vector of 4 input gate signals for switches
General (Tab)
- Control source
- Specifies how switches are controled. It is possible to choose between: Digital inputs and Model
- More details about each type of control can be found in the Control section
- If Digital inputs is selected as Control, the following
properties can be used:
- S1
- Digital input that is used to control S1 switch
- S1 logic
- Logic that will be applied to control signal for S1
- Active high or active low
- S2
- Digital input that is used to control S2 switch
- S2 logic
- Logic that will be applied to control signal S2
- Active high or active low
- S3
- Digital input that is used to control S3 switch
- S3 logic
- Logic that will be applied to control signal for S3
- Active high or active low
- S4
- Digital input that is used to control S4 switch
- S4 logic
- Logic that will be applied to control signal for S4
- Active high or active low
- Switching enabled
- If enabled, gives a possibility to control if changes in the gate control signal is applied or not
- Sen
- Available if Gate control enabling is enabled
- Digital input that enables/disables switching
- Sen_logic
- Available if Gate control enabling is enabled
- Logic that will be applied to Sen signal
- S1
- If Model is selected as Control, the following properties can be
used:
- Execution rate
- Defines the period between two updates of gate control signals for the component. Gate control signals are provided as a signal processing input to component
- Execution rate
Advanced (Tab)
- PESB Optimization
- PESB Optimization is specific for optimization of real-time simulation and it is not applied to TyphoonSim at all. Changing its value will not affect TyphoonSim simulation at all.
- Enables/disables PESB optimization. More details can be found in the dedicated PESB Optimization section.
Extras (Tab)
The Extras tab gives you the opportunity to set Signal Access Management for the component.
- Public - Components marked as public expose their signals on all levels.
- Protected - Components marked as protected will hide their signals to components outside of their first locked parent component.
- Inherit - Components marked as inherit will take the nearest parent 'signal_access' property value that is set to a value other than inherit.