Three Phase Two-Level Current-Source Cycloconverter

Description of the Three Phase Two-Level Current-Source Cycloconverter component in Schematic Editor

A block diagram and input parameters for the converter block are given in Table 1

Table 1. A Three Phase Two-Level Current-Source Cycloconverter Component in the HIL Toolbox
component component dialog window component parameters

Three Phase Two-Level Current-Source Cycloconverter

  • General
    • Control (Digital inputs, Model)
    • Phase A S1 (1..32(64))
    • Phase A S2 (1..32(64))
    • Phase A S3 (1..32(64))
    • Phase A S4 (1..32(64))
    • Phase B S1 (1..32(64))
    • Phase B S2 (1..32(64))
    • Phase B S3 (1..32(64))
    • Phase B S4 (1..32(64))
    • Phase C S1 (1..32(64))
    • Phase C S2 (1..32(64))
    • Phase C S3 (1..32(64))
    • Phase C S4 (1..32(64))
    • gate_logic (active high, active low)
    • Gate control enabling (enables use of an external digital signal to enable the switching)
    • Sen (digital input selection for PWM enable)
Weight = 2

A schematic block diagram of the Three Phase Two-Level Current-Source Cycloconverter switching block with corresponding switch arrangement and naming is given in Figure 1.

With Digital inputs selected as the Control parameter, enables you to assign gate drive inputs to any of the digital input pins (from 1 to 32(64)). For example, if Phase A S1 is assigned to 1, the digital input pin 1 will be routed to the Phase A S1 switch gate drive. In addition, the gate_logic parameter selects either active high (High-level input voltage VIH turns on the switch), or active low (Low-level input voltage VIL turns on the switch) gate drive logic, depending on the your external controller design.

Figure 1. A schematic block diagram of a Three Phase Two-Level Current-Source Cycloconverter with corresponding switch naming

With Model selected as the Control parameter, enables you to set the IGBTs' gate drive signals directly from signal processing model. The input pin gates appears on the component and requires a vector input of twelve gate drive signals in the following order: [Phase A S1, Phase A S2, Phase A S3,Phase A S4, Phase B S1, Phase B S2, Phase B S3, Phase B S4, Phase C S1, Phase C S2, Phase C S3, Phase C S4]. When controlled from the model, logic is always active high.

Digital Alias

If a converter is controlled by digital inputs, an alias for every digital input used by the converter will be created. Digital input aliases will be available under the Digital inputs list alongside existing Digital input signals. The alias will be shown as Converter_name.Switch_name, where Converter_name is name of the converter component and Switch_name is name of the controllable switch in the converter.