Three Phase Inverter
Description of the Three phase two level inverter in Schematic Editor
A block diagram and input parameters for an inverter-rectifier block are given in Table 1.
component | component dialog window | component parameters |
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Three phase two level inverter |
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A schematic block diagram of the inverter switching block is given in Figure 1 with corresponding switch arrangement and naming.
Selecting Digital inputs as the Control parameter enables assigning gate drive inputs to any of the digital input pins (from 1 to 32(64)). For example, if Phase A S1 is assigned to 1, the digital input pin 1 will be routed to the Phase A S1 switch gate drive. In addition, the gate_logic parameter selects either active high (High-level input voltage VIH turns on the switch), or active low (Low-level input voltage VIL turns on the switch) gate drive logic, depending on the external controller design.
Selecting Internal modulator as the Control parameter, enables use of the internal PWM modulator for driving Phase A S1, Phase A S2, Phase B S1, Phase B S2, Phase C S1, and Phase C S2 switches instead of the digital input pins. In this configuration, four additional component inputs will be present. En input is used to enable/disable the internal PWM modulator, while InA, InB, and InC are used as reference signal inputs.
Selecting Digital input per leg as the Control parameter, enables assigning the leg drive input to any of the digital input pins (from 1 to 32(64)). For example, if Phase A S1 is assigned to 1, the digital input pin 1 will be routed through internal dead time module, to the Phase A S1 and Phase A S2 switch gate drives.
Selecting Model, as the Control parameter, enables setting the IGBTs' gate drive signals directly from the signal processing model. The input pin gates appears on the component and requires a vector input of six gate drive signals in the following order: [Phase A S1, Phase A S2, Phase B S1, Phase B S2, Phase C S1, Phase C S2]. When controlled from the model, logic is always active high.
Switching enabled, when checked, enables using an external PWM enabling digital signal.
DTV detection, when enabled, allows DTV detection to be signalized during simulation runtime.
Timing
When Enable delays is enabled, the turn on and turn off delay of the IGBTs will be included in the simulation. More information about this feature can be found in the dedicated section switching delay.
Losses calculation
When the Losses calculation property is enabled, the component will calculate switching and conduction power losses for all switching elements (IGBTs and Diodes or MOSFETs). In the case of MOSFET switching elements, the Diode characteristic represents an internal MOSFET body diode. Switching power losses are calculated as a function of current, voltage, and temperature using 3D Look-up tables (LUTs). Also, 2D input for losses is supported. When a 2D losses table is inserted, it assumes only current and temperature dependance. From version 2020.3, conduction power losses can be defined as a function of current and temperature using Vt and Vd Look-up tables (the previous definition using Vce, Rce, Vd, and Rd properties are removed). These LUTs can be either 1D or 2D. If the LUT is a 1D table, the forward voltage drop depends only on current. If the LUT is a 2D table, the forward voltage drop dependence on the junction temperature is included.
In the MOSFET case under reverse current conduction, the current sharing calculation between the MOSFET channel and the internal body diode is performed. Import options and an explanation of how to correctly fill in all the necessary power loss parameters is described in the Importing power losses data section.
Input/output power losses ports receive/generate vectors of twelve elements in the case of an IGBT switch type. The first element (index 0) is the upper IGBT in phase A, the second element (index 1) is the upper IGBT's diode in phase A. The next two elements are the phase A bottom IGBT and its diode, respectively. The 5th through 8th elements follow this same pattern for phase B, as do the 9th through 12th elements for phase C. In the case of MOSFET switch types, power losses ports receive/generate vectors of six elements. The first element (index 0) is the upper MOSFET and the second element (index 1) is the bottom MOSFET. The 3rd and 4th elements in the array follow this pattern for phase B, as do the 5th and 6th elements for phase C.
- Switch type - property to select semiconductor type. Available options are IGBT and MOSFET.
- Current values - Switching elements current axis [A]
- Voltage values - Switching elements switching losses, voltage axis [V]
- Temp values - Switching elements temperature axis [°C]
- Forward voltage drop definition method - property to select how FVD will be defined. Available options are Voltage and Resistance and LUT - discontinued from the 2020.3 release
- Vce - IGBT collector emitter saturation voltage [V] - discontinued from the 2020.3 release
- Rce - IGBT on state slope resistance [Ohm] - discontinued from the 2020.3 release
- Vd - IGBT Diode voltage drop [V] - discontinued from the 2020.3 release
- Rd - IGBT Diode slope resistance [Ohm] - discontinued from the 2020.3 release
- Vt table - Switch forward voltage drop, f(I,T) [V]
- Vd table - Diode forward voltage drop, f(I,T) [V]
- Et on table out - Switch switching ON losses, output energy, f(I, V, T) [J]
- Et off table out - Switch switching OFF losses, output energy, f(I, V, T) [J]
- Ed off table out - Diode switching OFF losses, output energy, f(I, V, T) [J]
Forward voltage drop
- based on Vce, Rce, Vd and Rd - discontinued from the 2020.3 release
- based on look up tables as a function of current and temperature. These LUTs can be 1D or 2D tables. If LUT is 1D table, forward voltage drop depends only on current. If LUT is 2D table, forward voltage drop depends also on temperature. Import options and explanation how to correctly fill all necessary power losses parameters are described in Importing power losses data.
For IGBT switches, the input values for FVD are vectors of twelve elements. The first element (index 0) is the upper IGBT in phase A, the second element (index 1) is the upper IGBT's diode in phase A. The next two elements are the phase A bottom IGBT and its diode, respectively. The 5th through 8th elements follow this same pattern for phase B, as do the 9th through 12th elements for phase C. In the case of MOSFET switch types, input port for FVD receives vector of six elements. The first element (index 0) is the upper MOSFET and the second element (index 1) is the bottom MOSFET. The 3rd and 4th elements in the array follow this pattern for phase B, as do the 5th and 6th elements for phase C.
- Switch type - property to select semiconductor type. Available options are IGBT and MOSFET.
- Current values - Switching elements current axis [A]
- Temp values - Switching elements temperature axis [°C]
- Forward voltage drop definition method - property to select how FVD will be defined. Available options are Voltage and Resistance and LUT - discontinued from 2020.3 release
- Vce - IGBT collector emitter saturation voltage [V] - discontinued from 2020.3 release
- Rce - IGBT on state slope resistance [Ohm] - discontinued from 2020.3 release
- Vd - IGBT Diode voltage drop [V] - discontinued from 2020.3 release
- Rd - IGBT Diode slope resistance [Ohm] - discontinued from 2020.3 release
- Vt table - Switch forward voltage drop, f(I,T) [V]
- Vd table - Diode forward voltage drop, f(I,T) [V]
Temperatures calculation
When the Temperatures calculation property is enabled, the component will calculate the combined power losses (P_loss) and junction temperatures (T_junctions) for all switching elements (IGBTs and diodes). Combined power losses represent the sum of the calculated switching and conduction losses transferred through an internally generated Thermal network component. The internally generated Thermal network component also calculates junction temperatures from power losses, input cases temperatures and provided thermal model parameters. Input/output ports for temperatures calculation are vectors of twelve elements and they are indexed in the same way as explained in the Losses calculation section.
- Thermal networks type - Defines type of internal thermal network
- Rth switch - List of thermal resistance for the IGBT switch
- Tth switch / Cth switch - List of thermal time constants or thermal capacitances for the IGBT switch
- Rth diode - List of thermal resistance for diode
- Tth diode / Cth diode - List of thermal time constants or thermal capacitances for diode
- Calculations execution rate - Execution rate in [s] for the losses and temperatures calculation logic
Output Voltage Comparator
Output Voltage Comparator signals are available in the digital signal list of models that contain Three-phase Two-level Inverter components. One such signal is generated for each leg of each three-phase inverter used in the model, under the name "component_name.IGBT Legx_vout_cmp", where component_name is Three-phase inverter's component name in the Schematic Editor, and x is the designator of a particular phase leg (1, 2, or 3).
Vout comparator pull-up mode property defines the operating mode of the output voltage comparator logic. For more information refer to Output Voltage Comparator.
Vout comparator timeout property defines the time period after which the logic switches into coasting mode. This feature is used to minimize output latency. For optimal performance, the timeout should be set to a value that is slightly higher than the maximum expected dead time. For more information refer to Output Voltage Comparator
PESB Optimization
The PESB Optimization option is available in certain converter models. When PESB Optimization is enabled, all converter's short circuit state space modes will be merged and treated as the same state space mode. For example, if one converter leg within the three phase converter is short circuited and PESB Optimization is enabled, all of the legs within the three phase converter will also be short circuited. This simplification for short circuit modeling can save a significant amount of matrix memory.
Digital Alias
If a converter is controlled by digital inputs, an alias for every digital input used by the converter will be created. Digital input aliases will be available under the Digital inputs list alongside existing Digital input signals. The alias will be shown as Converter_name.Switch_name, where Converter_name is name of the converter component and Switch_name is name of the controllable switch in the converter.