Converters
This section provided a general description of converters in Schematic Editor, including converter control options, thermal model, variable delay, and the Measurements tab.
In the Typhoon HIL toolchain, converter switches are modeled as ideal switches with zero on resistance, infinite off resistance, and instantaneous switching transition. In addition, all the converter switching blocks (i.e. two-level three-phase IGBT inverter, six-pulse diode rectifier etc.) are modeled as closed black-boxes that can only be used in the schematic diagram as is. Currently, is not possible for a user to construct new switching converters using individual switches. Each power electronics converter has its own weight, as shown in Table 1. The weight of a converter defines how many blocks can be run by a single processing core (SPC). Each SPC has processing capability for power electronics switching blocks weighing 3 or 4, depending on the used device and configuration.
| Power electronics converter weight table | |
|---|---|
| Converter description | Weight |
| Buck converter | 1 |
| Three level buck converter | 1 |
| Boost converter | 1 |
| Tapped inductor Buck - Boost converter | 1 |
| Tapped inductor Boost converter | 1 |
| Flyback converter | 1 |
| Antiparallel thyristor leg | 1 |
| AC Switch | 1 |
| Three phase antiparallel thyristors | 3 |
| Single phase diode rectifier | 1 |
| Two diode full wave rectifier | 1 |
| Single phase thyristor rectifier | 2 |
| Diode leg | 1 |
| IGBT Leg | 1 |
| T Type Leg | 1 |
| NPC Leg | 1 |
| ANPC Leg | 1 |
| Single phase inverter | 1 |
| Single phase H6 inverter | 2 |
| Single phase H6.5 inverter | 2 |
| Three phase diode rectifier | 3 |
| Three phase thyristor rectifier | 3 |
| Three phase two level inverter | 3 |
| Three phase two level current source inverter | 2 |
| Three phase three level NPC inverter | 3 |
| Three phase three level T-type inverter | 3 |
| Three phase three level capacitor clamped inverter | 3 |
| Three phase three level ANPC inverter | 3 |
| Three phase four level inverter | 3 |
| Three phase asymmetric inverter | 3 |
| Three level flying capacitor leg | 1 |
| Four level flying capacitor leg | 1 |
| Five level flying capacitor leg | 2 |
| Seven level flying capacitor leg | 3 |
| Nine level flying capacitor leg | 4 |
| ANPC flying capacitor inverter 7 level leg | 2 |
| ANPC flying capacitor inverter 9 level leg | 3 |
| MMC Leg - Switching Function | / |
| Active full wave rectifier | 1 |
| HERIC converter | 2 |
| Three Phase Two-Level Current-Source Cycloconverter | 2 |
| Quadratic Boost - R2P2 | 1 |
| Cuk | 1 |
| SEPIC | 1 |
| Symmetrical boost | 1 |
| Vienna rectifier | 3 |
| XY Converter | 2 |
| Zeta Converter | 1 or 2 |
| Forward Converter | 1 |
| Buck - Boost Converter | 1 |
| Three Phase Quasi-Z-Source Inverter | 3 |
| Push - Pull Converter | 1 |
| Flying Capacitor Boost Converter | 1 or 2 |
| 5L NE Type Converter | 2 |
| Super Lift Luo converter | 1 |
| Bidirectional Cuk converter | 1 |
| Half-bridge Flyback converter | 1 |
For example, a buck converter weighs 1 and a single-phase inverter weighs 2, so these two PESBs can fit together in one SPC. Three buck converters can also fit into one SPC. A three-phase inverter weighs 3, so an additional converter cannot fit into the same SPC as this inverter. Just as a reminder, circuits are split into separate processing cores using some of the available coupling components.
Converter control options
- Digital inputs (per switch or per phase leg) - per switch is supported by all controllable converters
- Internal modulator (internal FPGA-based modulator) - supported by a subset of converters
- Model (direct switch control from the signal processing model) - supported by all controllable converters
Digital inputs control options are supported by all controllable converters by default. GDS oversampling time (for example: the PWM gate drive signal) is higher than the simulation time step, which is as high as 6.25 ns for HIL402, 602+, and 604 devices, and 3.5 ns for HIL101, HIL404, HIL506, and HIL606 devices.
- IGBT leg
- Buck converter
- Boost converter
- Flyback converter
- Cuk converter
- Single phase two level converter (H-bridge)
- Three phase two level converter
- Three phase three level NPC converter
- Active Full Wave Rectifier
- Quadratic Boost - R2P2
- SEPIC converter
- XY converter
- Zeta converter
- Forward converter,
- Buck - Boost converter,
- Push - Pull converter,
- Flying Capacitor Boost Converter,
- Super Lift Luo converter,
- Tapped inductor Buck - Boost converter,
- Bidirectional Cuk converter,
- Tapped inductor Boost converter
There is one Enable input and 1 to 3 reference signal inputs depending on the number of PWM channels used. For example, the IGBT leg uses one PWM channel which requires only one reference input. The three-phase inverter requires three PWM channels and 3 corresponding reference inputs. Figure 1 shows the PWM modulator inputs for the IGBT leg and three-phase two-level converter.
The Model control option is available for all controllable converters. If the control option is set to Model, an additional signal input will appear: the input vector for the gate drive signals. The length of the input vector is equal to the number of controllable switches in the converter. An example is shown in Figure 2.
PWM enabling
PWM signals are activated by checking the PWM enabling checkbox.
The Sen parameter selects the digital input pin to supply the external PWM-enabling signal. When the signal is active, PWM signals are enabled and control their corresponding switches. The Sen_logic parameter selects either active high (High-level on the digital input turns on the PWM signals) or active low (Low-level on the digital input turns on the PWM signals) digital logic.
Switching delay
The Switching Delay - Timing feature models turn on and off delays for IGBTs (delay from active gate signal transition to the start of conducting and vice versa). The Turn Off Switching Delay option is defined as a function of the output current at the moment of switching, while the Turn On Delay option is constant. The maximum value of the delay is limited to 10µs.
Since the Switching Delay block is placed before the DTV (Dead Time Violation) logic, it can also be used to detect the minimum dead time period duration. In that case, Turn On Delay should be set to zero and Turn Off Delay should be set to the minimum dead time duration value.
The switching delay is activated by checking the Enable delays checkbox. Fixed and variable delays can be defined. A variable delay can be defined in a comma-separated form, as shown in Figure 5.
Measurements tab
It is possible to measure currents of the switches of a power electronics switching block. The specific currents to be measured can be chosen by checking the box next to their name. The Measurement tab is shown in Figure 6.
Checked measurement will appear in the list of output variables as I_(name)_(switch name). For example, if the converter name is 3phINV and the current measurement of Phase A Bottom Switch is checked, an analog signal named I_3phINV_Sa_bot will appear in analog output variables list.
PESB Optimization
The PESB Optimization option is available in certain converter models. When PESB Optimization is enabled, all converter's short circuit state space modes will be merged and treated as the same state space mode. For example, if one converter leg within the three phase converter is short circuited and PESB Optimization is enabled, all of the legs within the three phase converter will also be short circuited. This simplification for short circuit modeling can save a significant amount of matrix memory.
Converter components in Schematic Editor
The current version of Schematic Editor offers a selection of the following types of converter components:
Tapped inductor Buck - Boost converter
Tapped inductor Boost converter
Three-phase antiparallel thyristors
Single-phase thyristor rectifier
Thyristor LegSingle-phase two level H5 inverter
Single-phase two-level H6_5 inverter
Three Phase Thyristor Rectifier
Three Phase Three Level Flying Capacitor Inverter
Three phase two level current source inverter
Three phase asymmetric inverter
Three Level Flying Capacitor Inverter Leg
Four level flying capacitor leg
Five level flying capacitor leg
Seven level flying capacitor leg
Nine level flying capacitor leg
ANPC Flying Capacitor Inverter 9 Level Leg
ANPC Flying Capacitor Inverter 7 Level Leg
Three Phase Two-Level Current-Source Cycloconverter
Quadratic Boost - R2P2 converter
Quadratic Boost regular converter
Three Phase Quasi-Z-Source Inverter
Switched Capacitor Based 13L Inverter
Flying Capacitor Boost Converter
Bidirectional Cuk converterEnhanced Resolution converters
Enhanced Resolution converters are converters that do not use FPGA resources that are typically utilized by converters. Instead, these converters are run on a specialized FPGA hardware resource that is optimized for certain converter topology group in order to reduce simulation step. Solvers are a specialized hardware resource, present in some HIL device configurations (see Device Configuration Table). More details about a specific converter solver can be found in the dedicated document for that given solver.
At the moment, the following specialized converter solvers are available:
The current version of Schematic Editor offers a selection of the following types of enhanced resolution converter components:
Digital Alias
If a converter is controlled by digital inputs, an alias for every digital input used by the converter will be created. Digital input aliases will be available under the Digital inputs list alongside existing Digital input signals. The alias will be shown as Converter_name.Switch_name, where Converter_name is name of the converter component and Switch_name is name of the controllable switch in the converter.