Compilation status dock

This section describes compilation status dock

The compilation status window provides the user with useful information about the compilation process state in real time, about the optimization as well as about the final result. In Figure 1 is shown a compilation status window after a successful compilation. The information that can be found in the window are:

  1. The number of sub-circuits
  2. Model mapping to available processor resources:
    1. Signal Generator utilization,
    2. Look Up Table utilization,
    3. Standard Processing Core utilization,
    4. Machine Solver utilization,
    5. Power Electronics Switching Elements utilization,
    6. Contactor Unit utilization
  3. Matrix memory utilization for each SPC
  4. Simulation time slot usage for each SPC
  5. Simulation time step Ts.

Figure 1: Compilation status window