Implementation information
Basic information about the implementation of communication protocols in the Typhoon HIL toolchain
The Typhoon HIL toolchain features four different methods for implementing communication protocols:
- as a bare-metal application;
- as a protocol implemented in the hardware;
- as an embedded Linux application;
- as a component block.
The requirements of the protocol define the implementation:
- If the protocol has high requirements for determinism and speed, the protocol is implemented as a bare-metal application. These protocols mostly use either the Publisher/Subscriber or the multi-master communication type where there is no connection established and messages are not complex. In the Typhoon HIL toolchain, these protocols include:
- If the protocol has such high determinism requirements that even a bare-metal application cannot handle the speed, the protocol must be implemented on the hardware level in Hardware Description Language. In the Typhoon HIL toolchain, these protocols include:
- If the protocol does not have strict determinism requirements the protocol is implemented as an embedded Linux application. These protocols mostly us the Server/Client communication type while an active connection is established, with more complex message types being exchanged. In the Typhoon HIL toolchain, these protocols include:
- If the protocol is highly correlated with an existing implementation, it may be
implemented as a component block. In the Typhoon HIL toolchain, these protocols
include:
- CHAdeMO (based on CAN Bus protocol)
Naturally, if a protocol has higher speed/determinism requirements, the needed hardware resources will also increase. For protocols that require a hardware implementation, additional space on the FPGA must be reserved to implement the required IP Cores. Bare-metal protocols require a separate processor core for each application, while embedded Linux protocols have the most relaxed requirements, so multiple protocols can run on a single Linux processor core in parallel.
Only certain HIL devices and certain firmware configurations support one or more protocols that require a hardware implementation. This is defined in the Device Configuration Table.
Bare-metal communication protocols are executed on a dedicated processing cores called COMM CPU (short for Communication CPU). 4th generation HIL devices (HIL101, HIL404, HIL506, and HIL606) have 2 COMM CPU cores, while all previous generations have only 1 COMM CPU core. In other words, on a 4th generation HIL device, 2 bare-metal communication protocols can run in parallel, and on the other generations, just one.
The embedded Linux CPU core does not have a limitation on how many communication protocols can run simultaneously at the same time. However, running too many embedded Linux protocols in parallel may cause some degradation in model performance due to excessive CPU utilization.