Circuit solver configurations
This section describes circuits solver configurations
Each device configuration is tailored for a specific application. Differences among the configurations are in size and existence of specific functional units within the circuit solver.
Specific capabilities of each configuration can be seen in Schematic Editor -> Schematic Settings -> Hardware Settings -> Device Table. Or in Device Table of the Firmware Updater Tool. In those tables, the so called "hard limitations" are described. Some limits, such as number of passive elements may depend on the topology itself. There is no definitive answer to this question, because it depends on the complexity of the rest of the model. Obviously, if the model is composed of two converters, a machine, several sources, contactors, measurement components, etc. it could handle fewer passive components than the model which consists of purely passive components.If the circuit requirements exceed computational or memory resources available on the platform, the compiler will issue an error (Figure 1). Timing errors (Figure 2 c) can be solved by increasing the defined simulation time step or by switching to the auto time-step mode. Another option is to select a computationally less demanding discretization method.
Should the compiler report that there is not enough memory (Figure 16 b) for the model, the user has two options which can be combined to overcome the problem. The first and the most obvious solution is to reduce the circuit complexity (e.g. to remove some passive components or measurement blocks). The second option is to select a less demanding discretization method.
If some of the hard limitations are exceeded, a “device over-mapped” error will occur. Exactly what is wrong with the model can be seen in the compiler report window. For example, in figure a) a device is over-mapped because there are two LUTs (batteries or PV panels) requested, but only one is available (the HIL400 device supports only one LUT).