I am experiencing a strange discrepancy between my VHIL/HIL-to-HIL tests and my actual C-HIL setup.
My system overview:
- GFL inverter with LCL Filter (DC Link: 800V | Grid: 311 Vpeak).
- The plant (inverter and grid) built in Typhoon HIL simulator (HIL604)
- The controller programmed in TI C2000 MCU (Ti28069m) via PLECS Coder.
- PLECS Coder (MCU side) discretization is set to 1e-4. Typhoon HIL is set to "Auto" discretization.
I have successfully built and tested the complete control structure all the way to the outer loop (using power reference to generate the current reference). In this HIL-to-HIL environment, everything works great. Even when applying very high power references that cause some natural distortion, the grid current strictly maintains its sinusoidal shape.
When transitioning to the physical C-HIL, I rebuilt the system step-by-step.
The open-loop tests are perfectly fine (the TI MCU reads the ADC signals safely, and the PWM signals sent back to Typhoon HIL are correctly received).
However, the moment I close just the inner loop (current control), the system breaks. The grid current loses its sine shape entirely and becomes a mountain-shaped waveform.
Looking at the data, the output from the dq-to-abc transformation block shoots up to ~800V. Since the grid is 311V peak, the controller should ideally only demand around ~380V. This massive 800V request heavily saturates the PI controller and completely overmodulates the inverter. (I actually already tried manually scaling down this massive control output so it would safely fit into the PWM limits without overmodulating, but the resulting current still remained in that distorted, mountain-like shape.)
Are there specific execution/task synchronization settings between PLECS Coder and Typhoon HIL that I might have missed when transitioning from HIL-to-HIL to C-HIL? or any ideas on what this issue could be would be greatly appreciated!
