Fully embedded FPGA and CPU compiler
Compile high-fidelity real-time models without 3rd party tools. No low-level programming expertise required.
Typhoon Compiler is a single click solution that converts the graphical representation of a model to sets of instructions for Typhoon HIL’s Processor. The compilation process is fully automated, both for Electric circuit compilation (typically executed on FPGA) and Signal Processing circuit compilation (targeted for CPU execution).
Regardless of the model size, even for large-scale test stands with multi-HIL setups, the compilation is done quickly and efficiently, with no need for domain-specific expertise and any 3rd-party tools or toolchains.
Compiler log made for humans
Typhoon compiler gives you a detailed report during the compilation process. The report will warn you of defects and potential instabilities in the circuit. Moreover, if the compiler detects suboptimal model characteristic, it will give you guidance for model optimization.
The report will give you details about:
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- How the model is distributed to HIL devices and its processing cores;
- Which HIL resources are utilized, and how much;
- Simulation step and calculation time utilization;
- Detailed error and warning messages that will guide you during model development.
High-fidelity guaranteed
Rest assured that each switch permutation is emulated. Switching losses, too.
In Typhoon, electrical switches are modeled as ideal. As opposed to simulation approaches where switches are replaced with simplified equivalents (Pejovic switch model for example), ideal switches do not introduce unphysical behavior. Furthermore, ideal switches can be further enriched with turn-on and turn-off time delays, as well as real-time calculation of losses.
All calculations are made for each switch permutation. In other words, a linear state space model of the circuit is pre-calculated at each switch permutation.
The compiler will make sure the electrical circuit is converted from graphical representation to a discrete piecewise linear state space mathematical model. This novel approach enables the best possible utilization of processing resources with no effects on user experience.
Optimized for maximal utilization of your HIL resources
The number of linear state space systems in a piecewise linear model grows exponentially with the number of switches.
To linearize the exponential growth, large circuits are split into smaller ones with the help of circuit partitioning components.
Compiler (E-Cmpl) analyses the stability of the entire circuit and reports electric circuit conflicts as well as potential instabilities.
Compile to C-code too.
Take your code to a platform of your choice with ANSI C.
SP-Cmpl will convert the symbolic, graphical representation of signal processing blocks to C-code, compiled to a specific target processor and deployment platform.