Extras

These Signal Processing components focus on conversions, transformations, and other numerical operations that may be necessary for the model. Miscellaneous controller components that are not in other categories are also included here. Their descriptions and supported features are given in Table 1.

Table 1. Extra components in the Signal Processing category of the Schematic Editor core library

Component	Description	Features			Help file
		supported input types	supported output types	vector support
Counter	Counter with enable and edge or level sensitive reset	real, int, uint	real, int, uint	no	Counter
PID Controller	Discrete-time PID control with optional anti-windup feature	real, int, uint	real	no	PID Controller
RMS Value	Computes RMS value of an AC signal	real	real	no	RMS Value
	Computes mean value of an input signal	real	real	no	Mean Value
SR Flip Flop	SR Flip Flop	real, int, uint	real, int, uint	yes	SR Flip Flop
JK Flip Flop	JK Flip Flop	real, int, uint	real, int, uint	yes	JK Flip Flop
D Flip Flop	D Flip Flop	real, int, uint	real, int, uint	yes	D Flip Flop
PWM Modulator	Multi-channel PWM modulator with a symmetrical triangular carrier and dead time generator	real, int, uint	-	no	PWM modulator
abc to dq	Transformation from three-phase (abc) signal to dq0 rotating reference frame	real, int, uint	real	no	ABC to DQ
abc to alpha-beta-gamma	Transformation from three-phase (abc) signal to alpha-beta-gamma reference frame	real, int, uint	real	no	ABC to αβγ
dq to abc	Transformation from dq0 rotating reference frame to three-phase (abc)	real, int, uint	real	no	DQ to ABC
dq to alpha-beta	Transformation from dq reference frame to alpha-beta reference frame	real, int, uint	real	no	DQ to αβ
alpha-beta-gamma to abc	Transformation from alpha-beta-gamma reference frame to three-phase (abc) signal	real, int, uint	real	no	αβγ to ABC
alpha-beta to dq	Transformation from alpha-beta reference frame to dq reference frame	real, int, uint	real	no	αβ to DQ
Single Phase PLL	Single Phase PLL component based on SOGI	real	real	no	Single Phase PLL
Three Phase PLL	Three phase PLL	real	real	no	Three phase PLL
SVPWM References Generator	Space Vector PWM References Generator	real	real	no	SVPWM (Space Vector Pulse Width Modulation) reference generator
Sample and Hold	Samples an input signal each time a trigger event is detected.	real, int, uint	real, int, uint	yes	Sample and Hold
Gray Coder	Converts inputted unsigned integer value to Gray code	real, int, uint	real, int, uint	no	Gray Coder
FMI import	Adds support for FMU file import	real, int, uint	real, int, uint	no	FMU Import
PWM Analyzer	PWM Analyzer	-	real, int	yes	PWM Analyzer
FLL Sync	Frequency-locked Loop algorithm for grid synchronization	real	real	yes	FLL Sync