IO Timing

Sample rates and timing details for HIL 4/6 Series devices.

Sample Rates

Table 1. HIL 603 IO sample/update rates
IO class Sample/Update rate Comment
Digital input 50 MSPS All digital inputs are sampled simultaneously.
Digital output Up to 150 MSPS All digital outputs are updated simultaneously.
Analog input 2/t1 Odd and even input vectors are sampled in an interleaved manner.
Analog output 1/t1 All analog outputs are updated simultaneously.
Table 2. HIL 402, HIL 602+, HIL 604 IO sample/update rates
IO class Sample/Update rate Comment
Digital input 160 MSPS All digital inputs are sampled simultaneously.
Digital output Up to 160 MSPS All digital outputs are updated simultaneously.
Analog input 1/t1 All analog inputs are sampled simultaneously. Minimum sample time is 1μs
Analog output 1/t1 All analog outputs are updated simultaneously.
Table 3. HIL 404 IO sample/update rates
IO class Sample/Update rate Comment
Digital input 280 MSPS All digital inputs are sampled simultaneously.
Digital output Up to 280 MSPS All digital outputs are updated simultaneously.
Analog input 1/t1 All analog inputs are sampled simultaneously. Minimum sample time is 1μs
Analog output 1/t1 All analog outputs are updated simultaneously.

IO Timing Details

All IOs are updated in sync with the simulation step, which is defined by software. To improve the PWM sampling resolution, digital inputs actually run continuously at a higher sampling rate, independent of the simulation time step value.

Figure 1: IO timing diagram

Table 4. Key Timing Parameters
Symbol Parameter Value
t1 Simulation step Software defined
t2 Digital input sampling time Device specific
Table 5. Input timing details
IO class Acquisition period Results available in simulation
Digital output N N+1
Analog output N N+1
Table 6. Output timing details
IO class Calculation period Output valid
Digital output N N+1
Analog output N N+1